1. Field of the Invention
The present invention relates to a European digital broadcast receiver, and more particularly to a fast Fourier transform (FFT) processor. The present application is based on Korean Patent Application No. 2002-79293, which is incorporated herein by reference.
2. Description of the Prior Art
It is a trend with digital technology developments that broadcast methods are shifting from analog methods to digital methods. Some radio broadcasts have been done with digital transmission, while others are in preparation for digital transmission. The European digital audio broadcasts (DABs) employ orthogonal frequency division multiplexing (OFDM) for broadcast transmissions, and a fast Fourier transform (FFT) processor employed for the OFDM has FFT modes such as 256, 512, 1024, 2048, and so on, depending upon the number of input data.
The conventional fast Fourier transform processor has a memory address generation algorithm and a data butterfly operation algorithm, which are different, depending upon respective FFT modes for the fast Fourier transform.
For example, U.S. Pat. No. 6,035,313 entitled “Memory Address Generator for an FFT” applies the memory address generation algorithm in different ways depending upon respective FFT modes, which causes a problem of complicated process and implementation.
In the meantime, in general, there are the Radix-2 algorithm capable of processing input data of 2n FFT such as 256, 512, 1024, 2048, and so on, and the Radix-4 algorithm capable of processing input data of 4n FFT such as 256, 1024, and so on, for the fast Fourier transform algorithms. The Radix-2 algorithm has a disadvantage in that it has a relatively slow processing rate compared to the Radix-4 algorithm. Also, although the Radix-4 algorithm can process the input data of the 4n FFT modes of 256, 1024 and so on, the Radix-4 algorithm has a disadvantage in that it can not process the input data of the 2n FFT modes of 512, 2048, and so on. In order to solve the above-described problem, the U.S. Pat. No. 5,473,556 entitled “Digit Reverse for Mixed Radix FFT” provides a mixed Radix structure combining the Radix-2 structure and the Radix-4 structure for the algorithm structure.
However, such an algorithm structure combining the Radix-2 structure and the Radix-4 structure also has a problem of complicated implementation.